The present invention is related to integrated circuit structure and processing technology and, more particularly, to antifuses in integrated circuits and their manufacture.
Antifuses are found in a growing number of integrated circuits, most of which are field programmable gate arrays (FPGAs). As the name implies, antifuses have a very high resistance (to form essentially an open circuit) in the unprogrammed ("off") state, and a very low resistance (to form essentially a closed circuit in the programmed ("on") state. In these integrated circuits antifuses are placed at the intersections of interconnection lines which lead to different elements of the integrated circuit. By programming selected antifuses, the interconnections between the various elements of the integrated circuit are formed to define the function of the device.
Antifuses have various structures. One particular antifuse structure is described in U.S. Ser. No. 07/642,617, entitled "AN IMPROVED ANTIFUSE CIRCUIT STRUCTURE FOR USE IN A FIELD PROGRAMMABLE GATE ARRAY AND METHOD OF MANUFACTURE THEREOF," filed Jan. 17, 1991 by M. R. Holzworth et al. and assigned to the assignee of the present invention. In the described antifuse a semiconductor layer of amorphous silicon is sandwiched between two metal interconnection lines. A layer of TiW (titanium-tungsten) forms a barrier metal layer between the semiconductor layer and each metal interconnection layer.
Barrier metal layers function to block the undesired interdiffusion of a semiconductor layer and a metal layer, which, in the case of the described antifuse, is the amorphous silicon layer and each interconnection layer formed from aluminum alloy. Barrier metal layers are typically refractory metals, their intermetallics, alloys, silicides, nitrides and combinations thereof. Thus a typical barrier metal layer is TiN (titanium nitride).
However, it has been found that antifuses formed with TiN barrier metal layers have a discernable probability of having an undesirably high programmed resistance (R.sub.ON). TiN processes are familiar to many integrated circuit manufacturers and commonly used by them. This familiarity and use makes such manufacturers reluctant to abandon their TiN process in order to implement the antifuse structure. Furthermore, in semiconductor processing technology it is a general rule that manufacturers are reluctant to substitute any process for another due to cost and time constraints.
The present invention addresses this problem of TiN barrier metal layers in antifuses and provides for a solution by which TiN barrier metal processing technology may be adapted for use in manufacturing antifuses in integrated circuits without the problem described above.